Design Of Combinational Circuits and Multipliers Using Reversible Logic gates

Sayan Mukherjee; Sutapa Trivedy; Anurag Laha; Shounak Bhattacharya; Asima Adak; Anindya Sen

Design Of Combinational Circuits and Multipliers Using Reversible Logic gates

Author(s)	Mr. Sayan Mukherjee, Ms. Sutapa Trivedy, Mr. Anurag Laha, Mr. Shounak Bhattacharya, Dr. Asima Adak, Dr. Anindya Sen
Country	India
Abstract	Reversible logic design has come out as a promising area of research in the field of modern computing due to its capability to reduce energy dissipation. In traditional logic circuits, energy loss occurs mainly due to information loss. However, reversible logic guarantees that no information is lost during computing, aligning with Landauer's principle of low-power computing. This property makes reversible logic ideal for applications where power efficiency is to be maintained. This paper deals with the design and synthesis of circuits using reversible logic, primarily focusing on key reversible gates such as the Feynman Gate, Fredkin Gate, Toffoli Gate, Peres Gate. These gates serve as the key element for more complex systems and circuits. The paper traverses how these gates can be used to design efficient combinational circuitsshowcasing their versatility and practicality.Through simulation and theory, the paper evaluates the performance of these circuits in terms of gate count, garbage outputs, and quantum cost.The results of this project demonstrate the possibility of adopting reversible logic for sustainable and low-power electronic systems, enhancing its importance in future technological innovations.
Keywords	Reversible logic gates, Half Adder, Full Adder, Half Subtractor, Full Subtractor, Multiplexer, 1 bit comparator, Encoder, decoder, Parity Generator and Multiplier
Field	Engineering
Published In	Volume 16, Issue 3, July-September 2025
Published On	2025-07-05

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Design Of Combinational Circuits and Multipliers Using Reversible Logic gates

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